The present invention relates to operational amplifiers, and more particularly, to an operational amplifier having a negative slew rate enhancement circuit.
Operational amplifiers (op amps) are well known in electronic circuit design. A conventional op amp receives first and second input signals at its inverting and non-inverting inputs and provides an output signal as an amplified difference of the first and second input signals. The first and second input signals are typically processed through one or more differential amplifier stages and then through a differential-to-single-ended converter. An output drive stage takes the single-ended output signal and enables upper and lower output drive transistors serially coupled between first and second power supply potentials. The upper drive transistor in the output drive stage may be an NPN-type device while the bottom drive transistor is a PNP-type device.
A significant problem inherent in most if not all op amps is the limited negative slew rate (rate of voltage change over time) of the bottom PNP drive transistor. The positive slew may reach 300 V/us while the negative slew rate is only 200 V/us. The current sinking capability of the bottom PNP drive transistor also tends to be lower than the upper NPN drive transistor. As the need for higher speed op amps continues to grow, it becomes advantageous to increase the negative slew rate and also to provide more current sinking capability.